Fast ISPC Texture Compressor - Update

This article and the attached sample code project were written by Marc Fauconneau Dufresne at Intel Corp.

This sample demonstrates a state of the art BC7 (DX11) Texture compressor. BC7 partitioning decisions are narrowed down in multiple stages. Final candidates are optimized using iterative endpoint refinement. All BC7 modes are supported. SIMD instruction sets are exploited using the Intel SPMD Compiler. Various quality/performance trade-offs are offered.